Butterfly network for permutation or de-permutation utilized by channel algorithm

ABSTRACT

A butterfly network for channel coding permutation and de-permutation. The butterfly network may include a first side and a second side, wherein each of the first side and second side has at least one terminal and two or more columns of nodes located between the first and second sides, wherein a first column of the columns may interface the first side, a second column of the columns may interface the second side and each of the columns comprises at least one node, wherein each node of the columns may be connected to a first number of nodes in each of adjacent columns next to the columns, and said first number may be identical for all the nodes in the network, and wherein the nodes which may be selected as switches are concurrently controlled to perform switching operations.

BACKGROUND OF THE INVENTION

The present invention relates to a network for permutation or de-permutation, especially a butterfly network for permutation or de-permutation utilized by channel coding and a channel coding security concept thereof.

Turbo Code (TC), which is an example of the so-called channel coding, was invented in 1993 and can produce a near Shannon limit performance by applying an iterative decoding algorithm. In co-pending U.S. patent application Ser. No. 11/176,829 by Zheng et. al., innovative encoder and decoder designs were presented with real-time performance, wherein inter-sequence permutation and intra-sequence permutation are both utilized. Conventionally, many algorithms, e.g. lookup tables, can be used in performing permutations, but they are either complex or inflexible, and a new algorithm is preferred.

A so-called “butterfly network” is used to perform a method to illustrate FFT (Fast Fourier Transform), which is intensively used in the field of signal processing. However, its concept is also applied in other fields, for instance, U.S. Pat. No. 6,618,371 B1 and US Publication No. 2006/0039555 A1. In U.S. Pat. No. 6,618,371 B1, the butterfly network is used to create two independent paths ending at the same point for the purposes of load balancing, fault tolerance, or multicasting. In US Publication No. 2006/0039555 A1, the butterfly network is used in performing arbitrary permutation of a sequence in a processor. However, none of the prior art references applies the concept in the field of channel coding permutation and de-permutation.

The present invention provides an innovative but simple algorithm and hardware architecture for performing inter-sequence permutation at either the encoder end or decoder end with this concept. Preferably, the channel coding applying this concept is referred as “ZYX code” hereinafter.

BRIEF SUMMARY OF THE INVENTION

Examples of the present invention may provide a butterfly network for channel coding permutation and de-permutation. The butterfly network may include a first side and a second side. Each of the first side and the second side may have at least one terminal. The butterfly network may further include two or more columns of nodes located between the first side and the second side. A first column of the columns may interface the first side, and a second column of the columns may interface the second side. Each of the columns may include at least one node. Each node of the columns may be connected to a first number of nodes of each of adjacent columns to the columns. The first number may be identical for all the nodes in the butterfly network. The nodes that are selected as switches may be concurrently controlled to perform switching operations.

Some examples of the present invention may also provide a butterfly network for channel coding permutation and de-permutation. The butterfly network may include a first side and a second side, wherein each of the first side and second side has at least one terminal, two or more columns of nodes located between the first and second sides, wherein a first column of the columns interfaces the first side, a second column of the columns interfaces the second side and each of the columns comprises at least one node, wherein each node of one of the columns is connected to at least one node of an adjacent column next to the one of the columns, and wherein the nodes which are selected as switches are concurrently controlled to perform switching operations.

Additional features and advantages of the present invention will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. The features and advantages of the invention will be realized and attained by means of the elements and combinations particularly pointed out in the appended claims.

It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the invention, as claimed.

BRIEF DESCRIPTION OF THE SEVERAL VIEWS OF THE DRAWINGS

The foregoing summary, as well as the following detailed description of the invention, will be better understood when read in conjunction with the appended drawings. For the purpose of illustrating the invention, there are shown in the drawings examples which are presently preferred. It should be understood, however, that the invention is not limited to the precise arrangements and instrumentalities shown.

In the drawings:

FIG. 1 is a diagram illustrating a network adopting a butterfly network according to an example of the present invention;

FIG. 2 is a diagram illustrating an expanded network adopting three columns of nodes and the butterfly network according to another example of the present invention;

FIG. 3 is a diagram illustrating a butterfly network expanded by an Omega network according to still another example of the present invention;

FIG. 4 is a diagram illustrating an exemplary butterfly network of FIG. 2 after “folding and combination”;

FIG. 5 is a diagram illustrating an exemplary pipelined-staged butterfly network formed by combining two networks at terminals according to yet another example of the present invention.;

FIG. 6 is a flow chart illustrating a method of operating a butterfly network for channel coding permutation and de-permutation according to other example of the present invention; and

FIG. 7 is a diagram illustrating actual operations of the method shown in FIG. 6.

DETAILED DESCRIPTION OF THE INVENTION

Reference will now be made in detail to the present examples of the invention illustrated in the accompanying drawings. Wherever possible, the same reference numbers will be used throughout the drawings to refer to the same or like portions.

FIG. 1 is a diagram illustrating a butterfly network (100) according to an example of the present invention. Refer to FIG. 1, a basic structure of the butterfly network (100) may comprise a first side (101) and a second side (102). Each of the first side (101) and second side (102) may have 4 terminals (103). The butterfly network (100) may comprise two columns (105, 106) of nodes (104) located between the first and second sides (101, 102). A first column (105) may interface the first side (101) and a second column (106) may interface the second side (102). Each of the columns (105, 106) may comprise 4 nodes (104), wherein each of the nodes (104) may be connected to a first number of the nodes (104) (e.g. 2) of each of columns adjacent to the columns (105, 106), and the first number may be identical for all the nodes in the butterfly network (100). The nodes that are selected as switches may be concurrently controlled to perform switching operations.

In one example, each of the columns (105, 106) may comprise a second number of nodes being identical for each of the columns. In some examples, the second number may be different for each column. One reason for making the second number different for each column is memory management, and part of such examples will be discussed later in the specification.

Between the nodes (105, 106) and the terminals (103), certain logics of connection may exist. For example, the terminals of the first side (101) and second side (102) may have an exclusive node in the first column (105) and second column (106) respectively, and each of the terminals may be connected to each of the exclusive nodes. That is, one terminal may be connected to only one node and this node may be exclusively connected to this terminal in the present invention. However, exceptions may exist, for example, for the purpose of memory management, which will also be discussed later in the specification.

In the first paragraph of “DETAILED DESCRIPTION OF THE INVENTION”, a person of ordinary knowledge in related fields should understand that connections between nodes, and between nodes and terminals are not limited to the present invention, which is in the form of a FFT butterfly network. For example, referring to FIG. 2, the FFT butterfly network may be expanded to comprise more columns, or the Omega network in FIG. 3 may be adopted instead. In addition, ordinary Benes network and a fat tree network may be two possible alternatives. Even a network interiorly applying a p-by-p fully connected switching instead of a 2-by-2 fully connected switching can be used, where p is a positive integer. For example: Winograd Fourier Transform may use a network which applies p-by-p fully connected sub-network. It is easy to understand that many alternative patterns of connections all fall within the scope of the present invention as long as essential elements in the appended independent claims are utilized.

Also in the first paragraph of “DETAILED DESCRIPTION OF THE INVENTION”, the nodes that are selected as switches may be concurrently controlled to perform switching operations. For example in FIG. 1, assuming a direction of a data flow is from the first side (101) to the second side (103), the nodes selected as switches are the nodes of the first column (105), wherein every node may have two different switching operations because every node of the first column (105) may have two choices (flowing horizontally or obliquely) to output the data flow through the butterfly network. Therefore, all nodes may be concurrently controlled to perform one of possible switching operations.

One skilled in the art may have noted that every node of the second column (106) has only one choice to output the data flow through the butterfly network. Therefore, every node of the second column (106) may not serve as a switch. However, some or all of the nodes of the second column (106) may serve as switches if said some or all of the nodes outputting data to more than one terminal (103) in some examples.

The terminals of the first side (101) may be intra-block permuters and the terminals of the second side (102) may be memory buffers, or vice versa.

The terminals of the first side (101) may be a posteriori probability (APP) decoders and the terminals of the second side (102) may be memory buffers, or vice versa.

In one example, for purposes of memory management, cost saving, space saving, fewer terminals or nodes may be used after the procedure of “folding and combination” in FIG. 2. Please refer to FIG. 2 and FIG. 4 for an example of “folding and combination.” The “folding and combination” may be performed on either side of the network but never between sides. That is, terminals (103-1) may be combined with terminal (103-2), (103-3) or (103-4) but never with terminal (104-9), (104-10), (104-11) or (104-12). Moreover, a terminal of the terminals of the first side may be combined with another terminal of the first side, and a terminal of the terminals of the second side may be combined with another terminal of the second side. Accordingly, a node of the nodes in a column of said columns may be combined with another node in the same column. A preferred “folding and combination” is shown in FIG. 4, in which the terminal (103-5) is combined with the terminal (103-7), the terminal (103-6) is combined with the terminal (103-8), and the node (104-5) is combined with the node (104-7), the node (104-6) is combined with the node (104-8), accordingly. In FIG. 4, dotted lines represent connections that are moved. Node (104-13) is generated by a combination of nodes (104-5) and (104-7), and so forth for nodes (104-14), (104-15) and (104-16). As for the second side, only two terminals are left now: terminals (103-9) and (103-10), which are combinations of terminals (103-5), (103-7), and terminals (103-6), (103-8), respectively. Take terminal (103-9) of FIG. 4 for example, terminals (103-5) and (103-7) are still represented as individual components in the terminal (103-9). However, practically the terminals (103-5) and (103-7) may be seamlessly merged (or “unified”) into the terminal (103-9) and map be distinguished by “mapping”, which means, in the case that they are memory buffers, a connection (401) is mapped to access a certain range of addresses (representing terminal (103-5)) and a connection (402) is mapped to another (representing terminal (103-7).) The concept is the same for a terminal (103-10).

Again in FIG. 4, connections between the nodes and the terminals are combined to form a single connection, if the connections overlap and are identical. For instance, under the assumption that the mapping can be done within the terminal (103-9), connections (401) and (402) can be combined into a single connection. Similarly, connections between the nodes are combined to form a single connection, if the connections overlap and are identical. For instance, connections (403) and (404) can be combined into a single connection in FIG. 4. These are conventional techniques and detailed explanation is not necessary.

As shown in FIG. 5, two or more said networks can be connected to each other in the manner that each terminal of the first side (101) of a network serves to be connected to a terminal of another network at the second side (102), or similarly, each terminal of the second side (102) of a network serves to be connected to a terminal of another network at the first side (101). FIG. 5A and FIG. 5B illustrate two different networks, which are both covered by the present invention. In FIG. 5C, terminals (103-1), (103-2), (103-3) and (103-4) of the network in FIG. 5A are connected to terminals (501-1), (501-2), (501-3) and (501-4) of the network in FIG. 5B, respectively. For persons skilled in the art, practically the structure in FIG. 5C) can be simplified to become the structure of FIG. 5D) by combining terminals (103-1) with (501-1), (103-2) with (501-2), (103-3) with (501-3), and (103-4) with (501-4). The new nodes after said combination are denoted as (504-1), (504-2), (504-3) and (504-4), respectively. Each of the nodes (504-1), (504-2), (504-3) and (504-4) can work like an ordinary node with switching functions as stated before, or with an additional function of buffering. The network in FIG. 5D is often called “pipelined-staged” in the art.

FIG. 6 is a diagram illustrating a method of operating a butterfly network according to an example of the present invention. The method may include: determining a direction that a data flow from a first side to a second side through the butterfly network (a); determining control elements of control signals and the quantity of the control elements corresponding to said first number (b); selecting each of the control elements is associated with one of the switching operations of the nodes as switches (c); providing a control sequence composed of the control signals arranged in a row (d); reading at least one of the control signals for all the nodes (e); inputting a data flow to be manipulated to the butterfly network (f); performing a switching operation of the switching operations for the nodes according to the control element of the control signals read (g); and transferring at least one part of the data flow from the first side to the second side through paths established by the switching operations of the nodes (h).

The control elements determine what can be included in any of the control signals. Each of the control elements can be represented by a binary number, or a number within a limited numerical range or set. For example, in a digital system, the control signals are composed of binary control elements. The control elements are set to be “0” and “1.” In some communication systems, the control elements may be chosen within a set of numbers, such as a set of “100”, “0” and “−100”, in order to alleviate signal deterioration due to the presence of noise.

For instance, some or all of the nodes of a column in the butterfly network can be switched to output data through horizontal connections upon receipt of the control element “0” and through oblique connections upon receipt of the control element “1”, or vice versa. For example, in FIG. 2, four sets of available signal paths can be derived since under the circumstance that all switching nodes on the same column are set to output data through either horizontally upon receipt of one of the control elements or output data at oblique connection upon receipt of another of the control elements. The first set may include paths 201, 203, 206, 208, 209, 212, 213 and 216. The second set may include paths 201, 203, 206, 208, 210, 211, 214 and 215. The third set may include paths 202, 204, 205, 207, 209, 212, 213 and 216. The fourth set may include paths 202, 204, 205, 207, 210, 211, 214 and 215. It should be noted that the four sets of paths illustrated above are just an example. For certain purposes, more than one set of paths can be activated at a time. One can assign each of switching nodes within a column different actions upon receipt of an identical control element. For instance, node 104-1 outputs data horizontally and node 104-2 outputs data obliquely both upon receipt of the control element “0.” Note that normally the quantity of the control elements may equal to the first number for that the first number represents the number of possible choices of the switching operations. Therefore, only one control element is required to control switching of a plurality of nodes.

Furthermore, if the data flow is not completely transmitted, normally step (f) is repeated for reading another control signal, and subsequently performing steps (g) and (h) until the whole data flow is transmitted.

In this example, the number of control signals in the control sequence is 4, which is identical to the number of data elements in each of the input sequences. However, in some cases, the control sequence may be shorter or longer than the length of each of the input sequences for various purposes such as efficiency or security. If a control sequence is shorter than the length of each of the input sequences, at least one of the control signals is read more than once at the step (f), and used by more than one step (g). For example, the control sequence can be used again from the beginning if all 4 control signals are used and a fifth control signal is requested. On the contrary, at least one of the control signals may not be read in step (f) if the control sequence is longer than the length of each of the input sequences. Whether a control signal is used or not can depend on a security algorithm, for example.

The method of the present invention is particularly designed for permutation or de-permutation utilized in channel coding algorithms, wherein the data flow can be permuted in an encoder and permuted/de-permutated in a decoder. Note that permutations and de-permutations can both be performed in the decoder due to the internal algorithm of the decoder. De-permutations are actually performed in the same way as the permutations discussed above. As what can be seen from FIG. 6, the data flow manipulated by said method (permuted sequences (709, 710, 711, 712)) can be de-permuted to be the data flow of step (e) (the input sequences (705, 706, 707, 708)) by repeating said method again by providing a control sequence comprising contents identical to the control sequence. Note that the direction of de-permutation is not necessary from the second side to the first side. It can also be performed from the first side to the second side with the same control sequence, which further simplifies manufacturing and broadens applications because an identical design of the network can be used in both an encoder side and a decoder side.

For the purpose of security, the control sequence can be made different between two or more encoder-decoder pairs, and the control sequence can be applied in turbo code. In the case that multiple encoder-decoder pairs are utilized, an encoder can be repeatedly used in more than one encoder-decoder pairs. LDPC code can apply the same concept to construct a parity-check matrices. In a broad sense the control sequence can also be applied in LDPC code to attain the purpose of heightening security. In such a design, a third party without holding the correct control sequence cannot convert the manipulated data flow into original one, even if the transmission is intercepted between the encoder and decoder. Preferably, the control sequence is encrypted when delivered from the encoder to the decoder. The term “delivered” is not limited to wireless communication. For example, if the encoder is a wireless service provider and the decoder is an user, the control sequence can be delivered to the user by a mailed security data sheet (or card), encrypted Internet connection, and so on.

It will be appreciated by those skilled in the art that although in describing the above examples the specification may take the 4×4 block as the examples. However, it will be appreciated by those skilled in the art that the method of the present invention may also be capable of applying to an 8×8 block, 16×16 block or any other possible type of blocks in an H.264 video sequence. Therefore in the type of the block applied in the examples should not be construed as limitations on the claims.

Furthermore, in describing representative examples of the present invention, the specification may have presented the method and/or process of the present invention as a particular sequence of steps. However, to the extent that the method or process does not rely on the particular order of steps set forth herein, the method or process should not be limited to the particular sequence of steps described. As one of ordinary skill in the art would appreciate, other sequences of steps may be possible. Therefore, the particular order of the steps set forth in the specification should not be construed as limitations on the claims. In addition, the claims directed to the method and/or process of the present invention should not be limited to the performance of their steps in the order written, and one skilled in the art can readily appreciate that the sequences may be varied and still remain within the spirit and scope of the present invention.

It will be appreciated by those skilled in the art that changes could be made to the examples described above without departing from the broad inventive concept thereof. It is understood, therefore, that this invention is not limited to the particular examples disclosed, but it is intended to cover modifications within the spirit and scope of the present invention as defined by the appended claims. 

1. A butterfly network for channel coding permutation and de-permutation, the butterfly network comprising: a first side and a second side, wherein each of the first side and second side has at least one terminal; and two or more columns of nodes located between the first and second sides, wherein a first column of the columns interfaces the first side, a second column of the columns interfaces the second side and each of the columns comprises at least one node, wherein each node of the columns is connected to a first number of nodes in each of adjacent columns next to the columns, and said first number is identical for all the nodes in the network, and wherein the nodes which are selected as switches are concurrently controlled to perform switching operations.
 2. The butterfly network of claim 1, wherein each of the columns comprises a second number of nodes and the second number is identical for each of the columns.
 3. The butterfly network of claim 1, wherein the terminals of the first side and second side have an exclusive node in the first column and second column, respectively, and each of the terminals is connected to each of the exclusive nodes.
 4. The butterfly network of claim 1, wherein a terminal of the terminals of the first side is combined with another terminal of the first side, and a terminal of the terminals of the second side is combined with another terminal of the second side.
 5. The butterfly network of claim 1, wherein a node of the nodes in a column of the columns is combined with another node in the same column.
 6. The butterfly network of claim 4, wherein the connections between the nodes and the terminals are combined to form a single connection, if the connections overlap and are identical.
 7. The butterfly network of claim 5, wherein the connections between the nodes are combined to form a single connection, if said connections overlap and are identical.
 8. The butterfly network of claim 1, wherein the nodes which are selected as switches are nodes of the first column, if a predetermined direction of data flow through the network is from the first side to the second side.
 9. The butterfly network of claim 1, wherein the terminals of the first side or the second side are intra-block permuters and the terminals of the other side are memory buffers, wherein the other side of the first side is the second side and vise versa.
 10. The butterfly network of claim 1, wherein the terminals of the first side or the second side are a posteriori probability (APP) decoders and the terminals of the other side are memory buffers, wherein the other side of the first side is the second side and vise versa.
 11. A butterfly network for channel coding permutation and de-permutation, the butterfly network comprising: a first side and a second side, wherein each of the first side and second side has at least one terminal; and two or more columns of nodes located between the first and second sides, wherein a first column of the columns interfaces the first side, a second column of the columns interfaces the second side and each of the columns comprises at least one node, wherein each node of one of the columns is connected to at least one node of an adjacent column next to the one of the columns, and wherein the nodes which are selected as switches are concurrently controlled to perform switching operations.
 12. The butterfly network of claim 11, wherein the terminals of the first side and second side have an exclusive node in the first column and second column, respectively, and each of the terminals is connected to each of the exclusive nodes.
 13. The butterfly network of claim 11, wherein a terminal of the terminals of the first side is combined with another terminal of the first side, and a terminal of the terminals of the second side is combined with another terminal of the second side.
 14. The butterfly network of claim 11, wherein a node of the nodes in a column of the columns is combined with another node in the same column.
 15. The butterfly network of claim 14, wherein the connections between the nodes and the terminals are combined to form a single connection, if the connections overlap and are identical.
 16. The butterfly network of claim 15, wherein the connections between the nodes are combined to form a single connection, if said connections overlap and are identical.
 17. The butterfly network of claim 11, wherein the nodes which are selected as switches are nodes of the first column, if a predetermined direction of data flow through the network is from the first side to the second side.
 18. The butterfly network of claim 11, wherein the terminals of the first side or the second side are intra-block permuters and the terminals of the other side are memory buffers, wherein the other side of the first side is the second side and vise versa.
 19. The butterfly network of claim 11, wherein the terminals of the first side or the second side are a posteriori probability (APP) decoders and the terminals of the other side are memory buffers, wherein the other side of the first side is the second side and vise versa. 